
Overview of the SPIM-compatible console device
----------------------------------------------

 The SPIM-compatible Console Device models a serial controller with
 two 200-baud full-duplex communication lines and a 1 Hz clock providing
 timer interrupts.
 
 With a SPIM-compatible Console Device configured, the following interrupt
 lines are enabled.

 Interrupt line 2 (Cause bit 0x0400) is wired to the Clock
 Interrupt line 3 (Cause bit 0x0800) is wired to the #1 Keyboard
 Interrupt line 4 (Cause bit 0x1000) is wired to the #1 Display
 Interrupt line 5 (Cause bit 0x2000) is wired to the #2 Keyboard
 Interrupt line 6 (Cause bit 0x4000) is wired to the #2 Display

 The SPIM-compatible console device communicates with the CPU by means
 of a series of 9 32-bit-wide control and data registers, for a total
 of 36 memory-mapped bytes. The control registers are used for enabling
 and disabling specific devices' interrupt request mechanisms, and for
 determining which device(s) is/are ready for data when polling or during
 interrupt processing.

 Register             Offset
 ------------------   ------
 Keyboard 1 Control   00
 Keyboard 1 Data      04
 Display 1 Control    08
 Display 1 Data       0c
 Keyboard 2 Control   10
 Keyboard 2 Data      14
 Display 2 Control    18
 Display 2 Data       1c
 Clock Control        20

 Within each control register, Bit 2 of each word is the Device
 Interrupt Enable bit, and bit 1 is the Device Ready bit.  Only the
 Device Interrupt Enable bits of the control registers are writable;
 other bits must be written as zero. Only Device Interrupt Enable and
 Device Ready are readable; other bits read as zero.

 Within each data register, writes are allowed only to the
 least-significant 8 bits; the other 24 bits read as zero and must be
 written as zero.

 On a write to the data register, the display becomes unready and writes
 a char to the connected serial interface; it becomes ready again in 40
 ms. The keyboard data register is read-only.

 The keyboard is initially unready; whenever the connected serial
 interface has a char waiting on input, and the keyboard is unready,
 the keyboard reads the char into its buffer, and becomes ready. If the
 keyboard is ready for more than 40 ms., it will check the connected
 serial interface again.  If there is another char available, it will
 read it and save it in the buffer, writing over the one which was
 originally in the buffer. No provision is made for detection of these
 buffer overruns.

 On a read from the data register, if the keyboard is ready it becomes
 unready and returns the byte in its holding buffer. If the keyboard
 data register is read while the keyboard is unready, the data in the
 buffer is the same as when the keyboard was last ready. The display
 data register is write-only.

 The Clock has no data register and becomes ready at most every second. A
 read from the Clock Control register makes the clock unready. Writes to
 the clock control register are as above.

 When any of the above devices becomes ready while its Device Interrupt
 Enable bit is set, it also sets the appropriate bits in the Cause
 register of CP0 and signals an Interrupt exception.

Description of SPIM's implementation of the keyboard
----------------------------------------------------

 The keyboard becomes unready on a read from the data register.
 Updates happen once per instruction fetched.

 During an update, if the keyboard time's tv_sec field is nonzero, the
 keyboard's count is incremented, and if the keyboard time is more than
 40 ms. ago and the keyboard's count is more than 4000, a timeout
 occurs: the keyboard time's tv_sec field is set to zero and the count
 is set to zero.

 Then, if the keyboard is unready (meaning that the data register has been
 read since the last byte was received), or the keyboard time's tv_sec
 field is zero (meaning that the keyboard's count has incremented past
 4000 and the timeout has expired), the emulator attempts to get a byte
 from the host serial interface. If there is a byte, then the buffer is
 filled with that byte, the keyboard becomes ready, and the keyboard
 time is set to the current time.


